BxBFFT FFT

The BxBFFT is an amazing high-speed streaming Fast Fourier Transform for FPGAs and ASICs.

The BxBFFT is designed for applications where the sample rate is many times the FPGA clock rate, such as radar systems, lidar systems, spectral switches, cable TV, MKID photonic sensors, high-bandwidth beamformers, radio telescopes, test and measurement systems, analog system simulators, high-speed radios, cellular backhaul, medical imaging systems, and communication satellites. When the processing rates get high, the BxBFFT is second to none.

1. Power Savings and Thermal Advantages

2. Highest Clock Frequencies (Fmax)

Hundreds of MHz higher clock rates than the AMD/Xilinx XFFT. (Measurements in this Deep Dive)
Hundreds of MHz higher clock rates than the Altera Parallel FFT. (Measurements in this Deep Dive)
Hundreds of MHz higher clock rates than Open Source FFTs in Agilex7. (Measurements in this Deep Dive)
Hundreds of MHz higher clock rates than Open Source FFTs in Ultrascale+. (Measurements in this Deep Dive)
Where data is available, BxBFFTs are also shown to achieve higher Fmax than other commercial FFTs. For more information, see measurements in this Deep Dive and see measurements in this Deep Dive.
The measurements referenced above lead to this conclusion: The BxBFFT achieves the highest Fmax of any FFT IP for which data is available. From this it follows that the BxBFFT achieves the highest throughput and the lowest latency.

3. Largest Supported Range of FFT Sizes and of Parallel Processing Rates

BxBFFT size and parallelism are only limited by FPGA resources. Most other FFTs have arbitrary limits. For example, you can find AMD/Xilinx limits in this Deep Dive or you can find Altera Parallel FFT limits in this Deep Dive.
BxBFFT sizes are not limited to powers of 2. Instead, BxBFFTs exist for any FFT size that's a multiple of powers of 2, 3, 5, and 7 -- orders of magnitude more sizes. (See this Deep Dive has a visualization of the difference.)
BxBFFT parallel processing is also not limited to powers of 2. This sometimes allows dramatic decreases in processing load when matching ADC sampling rates with achievable FPGA clock rates.

4. Resource Savings

Half the FPGA LUTs of the AMD/Xilinx XFFT. (Measurements in this Deep Dive)
15% to 40% fewer ALMs than the Altera Parallel FFT. (Measurements in this Deep Dive)
20% to 50% fewer LUTs than Open Source FFTs in Ultrascale+. (Measurements in this Deep Dive)
10% to 40% fewer DSPs than the Altera Parallel FFT. (Measurements in this Deep Dive)
10% to 40% fewer DSPs than the AMD/Xilinx XFFT. (Measurements in this Deep Dive)
Where data is available, BxBFFTs are also shown to require fewer resources than other commercial FFTs. For more information, see measurements in this Deep Dive and see measurements in this Deep Dive.

5. Features, Options, and Controls

Real-to-complex BxBFFTs allow simple distortion-free interfacing to high-speed direct-sampling ADCs and DACs. (More details in this deep dive)
Background reset enables recovery from space single-event-upsets without complicated recovery protocols. (More details in this deep dive)
Data ordering controls support three different input and output data orders as well as flipping data for 2nd Nyquist operation and putting zero in the data center for complex baseband signals. Decimation-in-Time and Decimation-in-Frequency implementations are automatically selected to give these desired data orders with the greatest efficiency.(More details in this deep dive)
Amplitude management controls are available to provide maximum dynamic range while avoiding overflow. Controls are simplified beyond just shift schedules, to give precise control when FFT radix stages are not all radix 2, but could be 2, 3, 4, 5, 7, 8, or 16. (More details in this deep dive)
Forward flow control is available, either on each clock or between vectors. Unlike some FFT implementations, flow control doesn't stop FFTs already in progress. (More details in this deep dive)
Pipelining controls help maintain Fmax, which can decrease when there is resource contention. Most other FFTs do not have pipelining controls. (More details in this deep dive)
Memory management controls allow control of memory placement in the desired types of FPGA memory. (More details in this deep dive)
Two different FFT input and output interfaces are supported. One is a simple custom interface, the other is AXI-S standard. The simple custom interface supports changes in control signal numbers and timing to match a variety of sync requirements. (More details in this deep dive)
The BxBFFT supports twiddle tables for small table sizes, and on-the-fly twiddle generation to conserve memory for the larger table sizes found in longer FFTs. This is user-selectable. (More details in this deep dive)
The BxBFFT supports customer-selectable data bit width to control the tradeoffs between dynamic range, overflow risk, and resource usage. (More details in this deep dive)

6. Productivity

The BxBFFT is delivered as standard System-Veriog RTL code, not an encrypted model or synthesized netlist. This avoids the common compatibility issues of encrypted models and the simulation issues of synthesized netlists.
The BxBFFT code uses a simple RTL coding style that is friendly to third-party tools. The BxBFFT's code is tested with multiple simulation and synthesis tools, to help ensure its wide portability.
The BxBFFT's simple RTL coding style also requires less work for tools to parse, for faster simulator times and faster synthesis times, increasing productivity.
The BxBFFT's higher achievable FMax reduces the amount of work required to meet timing over that of other FFTs with lower timing margins.
The BxBFFT's amplitude management controls make it easier and quicker to meet dynamic range requirements.
The implementation flexibility provided by the BxBFFT's memory management, pipelining, and on-the-fly twiddle generation controls make it easier to fit the BxBFFT into tight resource footprints, to more quickly achieve program goals.
The BxBFFT has a very large number of controls, but customers don't need to deal with that complexity until it benefits them. The included BxBFFT templates set all controls to reasonable defaults that work out of the box and are the correct choices for most customer applications.
BxBFFT support helps to quickly address any issues and tailor FFT performance to meet customer needs.

7. Vendor Independence, FPGA Family Independence, and ASICs

The BxBFFT has been ported to AMD/Xilinx Ultrascale, Ultrascale+, and Versal architectures for same-week delivery, and will continue to be ported to new architectures. Series7 architectures can be supported at need, but will not have same-week delivery.
The BxBFFT has been ported to Altera Agilex7, Arria10, and Stratix10 architectures for same-week delivery, and will continue to be ported to new architectures. All Altera architectures are supported at need, but others will not have same-week delivery.
The high timing margins of the BxBFFT are intrinsic to its design, which is why it has been easy to maintain world-class performance across many very different FPGA architectures. This same portability also applies to future FPGA architectures, architectures from other FPGA vendors, and ASIC implementations. Where desired, high timing margins can also be exploited to reduce operating voltages, for the lowest FPGA or ASIC power consumption.

8. Comprehensive BxBFFT Delivery Package

BxBFFT RTL is delivered as a single System Verilog file with several associated data files for twiddle ROM tables. The small number of files keeps the delivery neat and file management easy. Internal names are mangled to prevent name conflicts with other BxBFFTs, with different BxBFFT versions, or with other customer IP.

The release includes implementation templates for quick and easy BxBFFT instantiation in customer designs. Included tests show basic operation of the BxBFFT through the templates.

The delivery package includes a 36-page User Guide. It describes all BxBFFT parameters, inputs, and outputs, and how to use them effectively to get the best performance.

C++ and Matlab simulation models are provided to simulate the BxBFFT. Tests results for these models are included in the release to verify that they match RTL simulation output. The tests themselves are included in the release so customers can repeat the tests with their own tool versions to verify there are no tool issues.

The release includes many release tests of the BxBFFT RTL, to verify performance prior to release and for customers to be able to verify performance at their site with their own tools.

The release includes many synthesis tests of the BxBFFT, to verify that the BxBFFT properly synthesizes, to check achievable Fmax, and to measure consumed resources. Synthesis reports are included in the release for customer inspection. Synthesis test scripts are included in the release for customers to verify synthesis results with their own tool versions.

Simulations of the synthesized netlists verify that the RTL was correctly understood by the synthesis tools. These tests are included in the release for customers to verify results with their own tool versions.

For AMD/Xilinx FPGAs, an AMD/Xilinx IP Integrator model is also included with a Quickstart guide. For those using AMD/Xilinx block designs, this is the fastest way to instantiate and configure a BxBFFT. The BxBFFT's IP Integrator interface is significantly superior to AMD/Xilinx's XFFT. (More details in this Deep Dive)

1. Power Savings and Thermal Advantages

2. Highest Clock Frequencies (Fmax)

3. Largest Supported Range of FFT Sizes and of Parallel Processing Rates

4. Resource Savings

5. Features, Options, and Controls

6. Productivity

7. Vendor Independence, FPGA Family Independence, and ASICs

8. Comprehensive BxBFFT Delivery Package

Conclusions

Contacts

Email Contact: ross@bxbsp.com

Phone Contact: +1-623-487-8011 (Typically you will need to leave a message.)

Links

Bit by Bit Signal Processing Main Page

BxBChan Product Main Page

The BxBFFT vs the Altera Parallel FFT

The BxBFFT vs the Dillon Engineering FFT

The BxBFFT vs the AMD/Xilinx XFFT

The BxBFFT vs the Matlab FFT

The BxBFFT vs Open Source FFTs in Agilex7

The BxBFFT vs Open Source FFTs in Ultrascale+

The BxBFFT's Customization Parameters

Select BxBFFT Features