BxBFFT vs Open Source FFTs in Ultrascale+

This page describes how a number of open source FFTs perform relative to the BxBFFT and to each other in AMD/Xilinx Ultrascale+ FPGAs. Comparisons in other AMD/Xilinx FPGAs follow the same general patterns.

To summarize the measurements below, the BxBFFT is at the top in the two most important categories: Fmax and power consumption, as well as most other categories. BxBFFTs also have significant advantages in features, capabilities, options, testing, documentation, examples, and support.

BxB has studied the performance of other FFTs for a particular reason, which is to provide the best possible BxBFFT. An understanding of where these FFTs excel and where they are limited has led to improvements in the BxBFFT. In addition, it is hard to claim that the BxBFFT has exceptional performance if the performance of other FFTs hasn't been fully studied. The plots below show the BxBFFT's exceptional performance.

Open Source FFTs

The open source FFTs chosen for this comparison meet two critera. First, they must be high-speed FFTs that operate on multiple input samples each clock. There are many additional FFTs designed for slower speeds, but they are in a different class and are not comparable. Second, RTL must be obtainable for the FFT, either VHDL or Verilog. So far, only one FFT, the CASPER FFT, has been excluded because RTL was too difficult to obtain. However, one point of comparison with the CASPER FFT was found, and it is included in a section below.

Here's a list of the open source FFTs being compared:

Astron FFT:

The Astron FFT was developed by the Netherlands Institute for Radio Astronomy for use in radio telescopes. It's coded in VHDL. It does not include a full bit reverse, so in the comparisons below it has an unfair advantage when comparing it with other FFTs that do include a full bit reverse. It's available on OpenCores under an Apache license.

CAStron FFT:

The Casper-Astron FFT is a modified version of the Astron FFT intended for possible use with the CASPER project to replace the heritage CASPER FFT. It's coded in VHDL. It does not include a full bit reverse, so in the comparisons below it has an unfair advantage when comparing it with other FFTs that do include a full bit reverse. It is available on GitHub under a GPL 3.0 license.

htfft:

The htfft is a GitHub project authored by Ben Reynwar, an independent developer from Tucson, Arizona. It uses a Python FFT generator that generates VHDL code. It's distributed under an MIT license.

SGen FFT:

The SGen FFT is a GitHub project authored by François Serre and the Department of Computer Science at ETH Zürich. It appears to be closely related to the Spiral FFT. It uses a Scala-language FFT generator to create FFT implementations in System Verilog. Alternately, there's a web site hosted by the Department of Computer Science at ETH Zürich that allows download of System Verilog code for specific FFT parameters. In the past the SGen FFT has been known to have issues, where at some sizes it generates FFT code that produces incorrect results. Other sizes work fine. Before you make extensive use of it, you should probably check that it works at the desired size(s) with a small testbench. It uses a GPL 3.0 license.

Spiral FFT:

The Spiral FFT is a result of the long-term Spiral project connected to Carnegie Mellon University. A basic version of the Spiral FFT generator coded in C and Python and is available on GitHub. It uses a BSD license. A commercial version is also available. Spiral FFT Verilog can also be generated from a web site that accepts specific FFT paramters.

ZipCPU FFT:

The ZipCPU FFT is a project created by Dan Gisselquist at his company Gisselquist Technology. It's availabe on GitHub. It uses an FFT generator written in C++ to generate Verilog code. It only works to process up to two parallel data points per clock; higher levels of parallelism aren't supported. It is distributed under an LGPLv3 license.

FFT Comparison Plots

Each of these FFTs is implemented with Vivado to determine achievable Fmax, estimated power consumption, and resources used. The AMD/Xilinx XFFT is also included on the plots for comparison, although there is a separate detailed comparison of the AMD/Xilinx XFFT versus the BxBFFT here. The results are plotted below.

For each plot, the X-Axis of the plot is divided into 6 sections, with different numbers of parallel-processed Points Per Clock (PPC). These vary from PPC2 to PPC64. In each section, FFT size varies from 128 to 262144. This allows a single plot to show a wide overview of FFT performance across a range of FFT Sizes and levels of parallel processing..

Achievable Fmax

This plots show setup-limited Fmax when each FFT is compiled with nothing else in the FPGA. "Setup-limited" means that the plot doesn't take into account speed limits internal to the DSPs, BRAMs, or URAMs. Achievable speeds in a real design will be lower, both because of these internal limits and because resource contention with other parts of a larger design brings down speeds.

Even when a design has far higher Fmax than is needed, the setup margin has advantages. It gives headroom to absorb timing degradation caused by resource contention from other IP in the FPGA. As a result, designs with higher setup-limited Fmax will close timing more easily than other designs, and will close timing where designs with lower Fmax cannot.

Power Consumption

This shows that the worst FFTs often use 1.5 times the power (or more) than the best FFTs.

LUT Resource usage

This shows that the worst FFTs often use 1.5 times the LUTs (or more) than the best FFTs.

REG Resource usage

REG performance isn't as important as other resources, since there are twice the available REGs as there are LUTs.

DSP Resource usage

DSP usage is often not incredibly important, since many FPGAs have large numbers of DSPs. However, for certain problems or certain FPGAs they can be critical.

BRAM Resource usage

Sometimes FFTs with high LUT usage but low BRAM usage have moved some data storage from BRAMs into distributed LUT RAM. This may be the case with the CAStron FFT and the Xilinx XFFT.

Supported Features and Controls

The BxBFFT supports a much wider range of features than any other FFT. For example, the BxBFFT supports real-to-complex FFTs, non-power-of-2 FFTs, amplitude management controls, pipelining controls, memory placement controls, and controls for automatic generation of twiddles.

CASPER FFT Comparison

The CASPER FFT currently has no RTL implementation, instead being instantiated through other means such as Matlab Simulink. For this reason, it was too difficult to include it in the extensive plots above. However, at least one comparison point has been published in the literature for CASPER FFT resource usage. This comes from a paper "A Digital Correlator Upgrade for the Arcminute MicroKelvin Imager" by Jack Hickish, Nima Razavi-Ghods, et al. The resources are for a Dual-Band FFT that has a customized layout allowing resource-reduction over a standard CASPER FFT. "Dual Band" indicates that this FFT block takes 2 FFTs simultaneously, sharing resources between the two. The FFT is a real-to-complex FFT with 4096 real input points and 2048 complex output points. It operates at a rate of 16 real input samples per clock and 8 complex output samples per clock. Input is 8 bit, output is 18 bit.

The BxBFFT doesn't have a Dual-Band mode, so this FFT would be replaced by two BxBFFTs. The BxBFFT doesn't operate in Virtex-6, so for comparison the BxBFFT is implemented in a Kintex Ultrascale FPGA, giving the BxBFFT a modest architecture advantage. The processing rate is matched, and also the real-to-complex FFT operation. A full 18-bit BxBFFT is implemented.

The comparison gives the following results:

The difference between these two results is quite significant, and more than can be easily explained by the difference between a Virtex-6 and a Kintex Ultrascale. Thus the BxBFFT appears to significantly outperform the CASPER FFT.

Conclusions

The BxBFFT is faster than all other studied FFTs, and one of the best on power. The BxBFFT is tops in most types of resource usage. The BxBFFT has better controls than other FFTs, and many more capabilities and options. The BxBFFT has extensive documentation, examples, verification, and support.

With the BxBFFT, you do get what you pay for. But if you can't afford anything, there are some other options, and these plots may help you choose.

Links

Bit by Bit Signal Processing Main Page

BxBFFT Product Main Page

BxBChan Product Main Page