Select BxBFFT Features
Select BxBFFT Features
This page covers some important features of the BxBFFT that deserve to be discussed in greater depth. Not all BxBFFT features are covered here. Other important features are covered in the page on BxBFFT Customization.
The BxBFFT supports FFTs with real inputs and complex outputs. These are typically used for data that comes directly from an ADC, with direct RF sampling.
A Real BxBFFT also ships with the corresponding Real FFT inverse. This takes complex inputs in and produces real outputs out. The inverse is typically used for data that goes directly to a DAC, also with direct RF sampling.
Using direct RF sampling on the ADC or DAC can simplify analog electronics. When direct RF sampling is not used, instead two ADCs are typically used with an analog complex baseband downconversion. One ADC is used for inphase and one is used for quadrature. This complex baseband downconversion has issues with additional parts, additional power, and signal balance. Using direct RF sampling avoids these issues.
With direct RF sampling, there is an issue of how to get the ADC data into the form of a complex signal, that is needed for some processing such as an FFT. This real-to-complex conversion can be performed digitally after the ADC with a dedicated real-to-complex conversion filter prior to the FFT. This approach causes filter rolloff that distorts the higher frequencies. It uses more logic. Instead, it makes sense to use a real-to-complex BxBFFT.
Thus a real-to-complex FFT has some significant benefits in certain applications. It helps preserve the highest accuracy, as there are no real-to-complex conversions before the FFT that create artifacts and impose filter rolloff.
Real-to-complex BxBFFTs are especially effective in direct channelization of sampled ADC data. In this case the BxBFFT is a component inside of a BxBChan. The real-to-complex BxBChan converts real data into separate complex channelized streams. The streams covering the bandwidth of desired signals can then be selected for further processing. This isolates desired signal bandwidths, without large-scale filter rolloff distortion. It also lowers the quantity of data, reducing processing burden for later signal processing operations. For more information, see the BxBChan web page.
The BxBFFT supports FFT sizes that are multiples of powers of 2, 3, 5, and 7, not just powers of 2. The BxB also supports non-power-of-2 Points Per Clock (PPC), which is the number of samples processed in parallel on each clock. (PPC is also sometimes called "SuperSample Rate", or SSR.)
The difference in supported sizes is vast. The graphs below illustrate how many FFT sizes and PPCs the BxBFFT supports, vs those supported by essentially any other hardware FFT. Over the range shown, the BxBFFT supports thousands of sizes where other FFTs support 21.
Although in this case the AMD/Xilinx SSR XFFT is shown, the supported sizes for almost any other hardware FFT are the same. Only the BxBFFT has extensive support and optimization for non-power-of-2 FFTs.
The graphs also show the power estimates from Vivado for each FFT. It's notable that non-power-of-2 BxBFFT power is often lower than power for an AMD/Xilinx XFFT of similar size. The BxBFFT's extensive optimization keeps resources and power down.
One of the most important advantages of non-power-of-2 BxBFFTs is that they allow non-power-of-2 Points Per Clock. Having more options for parallelism gives more options to make a design close. For example, to get a desired FFT throughput, PPC=4 might have too high an FPGA clock rate, but PPC=8 might require too much power or too many resources. In these cases, PPC=5 with a non-power-of-2 BxBFFT may lead to design closure. This factor becomes more significant as ADC and DAC rates increase. For example a design that can close with PPC=36 will use significantly less logic than the next power-of-2 step up of PPC=64.
In addition, non-power-of-2 BxBFFTs have system advantages. Non-power-of-2 FFTs give many more options to match bin frequencies to frequencies of existing equipment or to frequency standards. They also allow single-clock operation of some designs, where power-of-2 FFTs would require multiple synchronous clock sources. These factors can make designs close that otherwise would not, or they can reduce FPGA logic, complexity, and external part count.
The BxBFFT supports a feature where it can be fully reset while operating, without interrupting processing. This feature supports high-reliability operation in space environments, which have natural radiation. Radiation causes Single-Event Upsets (SEUs), which can cause transient errors (such as resetting counters) or persistent errors (such as altering the logic programmed into the FPGA). Frequent periodic background resets of the BxBFFT fix the transient errors caused by SEUs without affecting normal operation. It is not necessary to detect that an SEU occurred.
Competing FFTs often cannot fix SEU errors in the background. As a consequence, competing FFTs often can't fix SEU errors periodically at all. This is because the continued interruptions would adversely affect required system availability. However, the system must fix SEU errors, because leaving an SEU in place corrupts processing and also affects availability. One solution is to detect SEUs, so that the FFT is reset only when it needs to be reset. This leads to complicated detection schemes that aren't fully reliable. Another solution is to use algorithms that allow FFT idle time in which SEUs can be repaired. However, idle time is not natural for many applications. The BxBFFT avoids these issues and these complications with its background reset.
In the case where an SEU makes a persistent alteration to FPGA logic, the standard approach is to have a "scrubbing" operation that reads back the FPGA configuration, checks for changes to the logic, and repairs them. This makes the persistent SEU transient. The BxBFFT's background reset works well with this, to automatically restoring operation as soon as the logic is repaired.
For the highest reliability, Triple Module Redundancy (TMR) triplicates logic into three legs and then votes on the answer. This means that even when one set of logic is affected by an SEU, proper operation is not affected because the other two legs outvote the incorrect answer. The full SEU-protection scheme has TMR, then scrubbing, then a background reset of the BxBFFT to automatically finish the SEU repair. Each of these operations are independent and decoupled, for easy implementation. The background reset doesn't just restore BxBFFT operation; it also restores proper BxBFFT sync to match the other two operating BxBFFTs, so that system operation is fully and automatically restored.
This page discussed several important BxBFFT features. These features discussed here are rarely implemented in other FFTs, but support important applications.
The BxBFFT supports features like these as part of its commitment to cover the widest range of high-speed applications.